2018年度盛会NCAP & Yole先进封装及系统集成专题研讨会开始报名啦!

2018-05-09


  2018年6月20日-21日,华进和Yole将携手举办为期两天的先进封装及系统集成专题研讨会,内容覆盖封装5大方向,包括:板级封装、Fanout、系统级封装、先进基板、以及3D封装技术等等。会议将重点关注目前炙手可热的应用,如5G、AI、汽车及存储。本次会议演讲嘉宾来自全球知名企业及院校,包括:ASE Group、ERS、Gatech、HuaTian Technology、SPTS、Schweizer、CSU、USTC等等。

  同往届相比,本次新增半天性价比超高的短训班,特邀中科大林福江教授和日月光集团工程副总郭一凡博士为大家分别讲解射频IC设计封装表征与建模、高性能计算和先进封装技术开发的相关知识。林福江教授长期从事微波/微电子交叉学科的研究工作,特别是先进半导体器件的射频建模兼芯片集成方面,是公认的实用射频建模专家;郭一凡博士曾在国外知名院校担任教授,并先后在IBM、摩托罗拉、思佳讯和日月光任职,拥有丰富的研发、工程及运营经验。如果你希望在最短的时间,掌握最精华的知识,请在注册时选择“研讨会+短训班”,早鸟打包价仅400欧元。

  本次活动仅支持在线报名;注册平台现已开放,5月20日前注册可享受早鸟价,欢迎大家报名!研讨会议程将于下周发布,请关注华进微信公众号(NCAP-CN)或官网(www.ncap-cn.com)获取最新信息。

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  会议注册平台链接:www.eiseverywhere.com/ereg/index.php?eventid=332224&

  会议网站:NCAP & Yole Symposium


  此外,本次活动的赞助商计划正在热销中,如您希望借此平台进行企业推广,欢迎咨询。

赞助商计划(完整内容请以英文资料为准)


附:短训班讲师介绍及讲座摘要

1. Accurate Package Characterization and Modeling for RFIC Design

●Abstract:
Packages have great impacts on RFIC and high-speed IC performance for both bond-wire and package lead. They should be accurately characterized and modeled preferably in an equivalent circuit (EQC) model, so that they can be co-simulated for a reliable RFIC design. Although EM simulation is now widely used, it should be verified by practical measurement. This lecture will talk about experimental technique for accurate package modeling including full L and C matrix, as well as ground inductance based on VNA technique using RF probe station. Advanced EQC models are developed for RFIC design which have been proven for first-pass succss in packaged IC testing.

About the speaker: Fujiang Lin received the BSEE and MSEE degrees from USTC, Hefei, China, and the Dr.-Ing. degree in MMIC from the University of Kassel, Germany. Dr. Lin has been the “Chinese K-Talent Program” full time professor at USTC since 2010. He established the USTC Micro/nano-Elecronic System Integration R&D Center (MESIC) focusing on advanced nanotech devices modeling and IC design. Prior returning back USTC, Dr. Lin worked as SMTS and PI in the Institute of Microelectronics, A*STAR, Singapore; as adjunct Associate Professor at NUS; as Director in CHRT (now GlobalFoundries), as Technical Director at HP/Agilent (now Keysight) EEsof; as founder and CEO of Transilica Singapore. Professor Lin has extensive hand-on and multi-discipline experiences and knowledge in advanced micro-/nano-electronics technologies, RF modeling for MMIC/RFIC and Packages, as well as the related integrated circuits and system design.

2. HPC and Advanced Packaging Technology Development

Abstract:
In recent development of semiconductor technologies, it is becoming more and more clear that the AI, typically presented by the cloud computations, autonomous vehicles and neural networks, will be the next major area of applications.  One of the key characteristics of the AI applications is that it demands for high speed and extensive computation power.  However, since the Moore’s Law is approaching its limit and the IC performance improvement by scaling will slow down eventually, using packaging technology to enhance the IC performance becomes urgent and important. In this presentation, the evolution of packaging technologies in high speed applications is introduces. Several advanced packaging platforms and their design and process challenges are presented. New and potential packaging solutions and development progress are discussed.

About the speaker: Yifan Guo is a Vice President of Engineering in ASE Group.  In past 30 years, he has taken positions as Professors and Adjunct Professors at Virginia Tech, State University of New York at Binghamton and University of California at Irvine. He has also worked for IBM, Motorola, Skyworks, ASE, and held positions from middle to high level management in charges of R/D, engineering and operation. He has published 7 book chapters, 9 patents and more than 50 refereed journal papers. Yifan Guo got his Ph.D degree from Engineering Science and Mechanics (ESM) Department at Virginia Tech. and MBA degree from School of Business at University of Redlands in California.