2018年NCAP & Yole先进封装及系统集成专题研讨会演讲主题新鲜出炉!

2018-05-18

  2018年6月20日-21日,华进和Yole将在无锡日航酒店携手举办为期两天的先进封装及系统集成专题研讨会,内容覆盖封装5大方向,包括:板级封装、Fanout、系统级封装、先进基板、以及3D封装技术等等。会议将重点关注目前炙手可热的应用,如5G、AI、汽车及存储。

  自研讨会发布以来,受到国内外行业同仁的广泛关注。在华进和Yole的共同努力下,出席2018年研讨会的演讲嘉宾名单及演讲内容已基本确定。


  注:除短训班以外,研讨会演讲内容及顺序请以最终发布的活动议程为准。

  同往届相比,本次新增半天性价比超高的短训班,特邀汪正平院士、日月光集团工程副总郭一凡博士和中科大林福江教授为大家分别作电子封装技术及材料、高性能计算和先进封装技术开发射频IC设计封装表征与建模的报告。如果你希望在最短的时间,掌握最精华的知识,请在注册时选择“研讨会+短训班”,早鸟打包价仅400欧元。

  本次活动仅支持在线报名;注册平台现已开放,5月20日前注册可享受早鸟价,欢迎大家报名!研讨会议程将于下周发布,请关注华进微信公众号(NCAP-CN)或官网(www.ncap-cn.com)获取最新信息。

扫一扫关注


  会议注册平台链接:www.eiseverywhere.com/ereg/index.php?eventid=332224&

  会议网站:NCAP & Yole Symposium


  此外,本次活动的赞助商计划正在热销中,如您希望借此平台进行企业推广,欢迎咨询。

赞助商计划(完整内容请以英文资料为准)


附:短训班讲师介绍及讲座摘要

1.Electronic Packaging Technology and Materials

● Abstract:Polymers andnanocomposites are widely used in electronic and photonic packaging asadhesives, encapsulants, insulators, dielectrics, molding compounds andconducting elements for interconnects. These materials also play a criticalrole in the recent advances of low-cost, high performance novel No FlowUnderfills, Reworkable Underfills for Ball Grid Array (BGA), Chip ScalePackaging (CSP), System in a Package (SIP), Direct Chip Attach (DCA), Flip-Chip(FC), Paper-thin IC and 3D Packaging, Conductive Adhesives (both ICA and ACA),Embedded Passives (high K polymer composites), nano particles andnanofunctional materials such as CNTs, graphenes. It is imperative that bothmaterial suppliers, formulators and their users have a thorough understandingof polymeric materials and the recent advances on nano materials and theirimportance in the advances of the electronic packaging and interconnecttechnologies.

● About the speaker:Prof. Wongis a Regents’ Professor and the Charles Smithgall Institute Endowed Chair atthe School of Materials Science and Engineering, Georgia Institute ofTechnology (GT) and is the Dean of the Faculty of Engineering School, CityUniversity of Hong Kong (CUHK). He is also the team leader of the Guangdong Innovation Team for the Advanced Electronic PackagingMaterials (SIAT). Professor Wong has published widely with over 1000 technicalpapers and yielded fruitful research results and holds over 50 US patents.Professor Wong is considered an industry legend and has made significantcontributions to the industry by pioneering new materials, which fundamentallychanged the semiconductor packaging technology.

Professor Wong was awarded numerousinternational honors, such as being elected as AT&T Bell LaboratoriesFellow in 1992, the IEEE CPMT Society Outstanding Sustained TechnicalContributions Award in 1995, member of the US National Academy of Engineeringin 2000, the IEEE Third Millennium Medal in 2000, the IEEE EAB Education Awardin 2001, the IEEE CPMT Society Exceptional Technical Contributions Award in2002, the Georgia Tech Class 1934 Distinguished Professor Award in 2004, namedholder of the Charles Smithgall Chair (one of the two GT Institute Chairs) in2005, the GT Outstanding PhD Thesis Advisor Award, the IEEE Components,Packaging and Manufacturing Technology Field Award in 2006, the Sigma Xi’sMonie Ferst Award in 2007, the Society of Manufacturing Engineers’ TotalExcellence in Electronic Manufacturing Award in 2008 and the IEEE CPMT DavidFeldman Award in 2009 and Dresden Barkhausen Award in 2012. He has recentlyreceived the Pennsylvania State University Outstanding Science Alumni Award.

 

2. HPC and AdvancedPackaging Technology Development

●  Abstract: In recent development of semiconductor technologies, it isbecoming more and more clear that the AI, typically presented by the cloudcomputations, autonomous vehicles and neural networks, will be the next majorarea of applications.  One of the keycharacteristics of the AI applications is that it demands for high speed andextensive computation power.  However,since the Moore’s Law is approachingits limit and the IC performance improvement by scaling will slow downeventually, using packaging technology to enhance the IC performance becomesurgent and important. In this presentation, the evolution of packagingtechnologies in high speed applications is introduces. Several advancedpackaging platforms and their design and process challenges are presented. Newand potential packaging solutions and development progress are discussed.

● About thespeaker: Yifan Guo is a Vice President ofEngineering in ASE Group.  In past 30years, he has taken positions as Professors and Adjunct Professors at VirginiaTech, State University of New York at Binghamton and University of Californiaat Irvine. He has also worked for IBM, Motorola, Skyworks, ASE, and heldpositions from middle to high level management in charges of R/D, engineeringand operation. He has published 7 book chapters, 9 patents and more than 50refereed journal papers. Yifan Guo got his Ph.D degree from Engineering Scienceand Mechanics (ESM) Department at Virginia Tech. and MBA degree from School ofBusiness at University of Redlands in California.

 

3. Accurate PackageCharacterization and Modeling for RFIC Design

● Abstract: Packages have great impacts on RFIC and high-speed IC performancefor both bond-wire and package lead. They should be accurately characterizedand modeled preferably in an equivalent circuit (EQC) model, so that they canbe co-simulated for a reliable RFIC design. Although EM simulation is nowwidely used, it should be verified by practical measurement. This lecture willtalk about experimental technique for accurate package modeling including fullL and C matrix, as well as ground inductance based on VNA technique using RFprobe station. Advanced EQC models are developed for RFIC design which havebeen proven for first-pass succss in packaged IC testing.

● About thespeaker: Fujiang Lin received the BSEE and MSEEdegrees from USTC, Hefei, China, and the Dr.-Ing. degree in MMIC from theUniversity of Kassel, Germany. Dr. Lin has been the “Chinese K-Talent Program”full time professor at USTC since 2010. He established the USTCMicro/nano-Elecronic System Integration R&D Center (MESIC) focusing onadvanced nanotech devices modeling and IC design. Prior returning back USTC,Dr. Lin worked as SMTS and PI in the Institute of Microelectronics, A*STAR,Singapore; as adjunct Associate Professor at NUS; as Director in CHRT (nowGlobalFoundries), as Technical Director at HP/Agilent (now Keysight) EEsof; asfounder and CEO of Transilica Singapore. Professor Lin has extensive hand-onand multi-discipline experiences and knowledge in advancedmicro-/nano-electronics technologies, RF modeling for MMIC/RFIC and Packages,as well as the related integrated circuits and system design.